A hardware description language using OCaml effects
This is an idea proposed in 2025 as a Cambridge Computer Science Part III or MPhil project, and is available for being worked on. It may be co-supervised with
Programming FPGAs using functional programming languages is a very good fit for
the problem domain. OCaml has the
HardCaml is very successfully used in production at places like Jane Street, but needs quite a lot of prerequisite knowledge about the full OCaml language. In particular, it makes very heavy use of the module system in order to build up the circuit description as an OCaml data structure.
Instead of building up a circuit as the output of the OCaml program, it would be very cool if we could directly implement the circuit as OCaml code by evaluating it. This is an approach that works very successfully in the Clash Haskell HDL, as described in this thesis. Clash uses a number of advanced Haskell type-level features to encode fixed-length vectors (very convenient for hardware description) and has an interactive REPL that allows for exploration without requiring a separate test bench.
The question for this project is whether the new
- using effects for control-flow memoisation (see the example)
- restricting arbitrary recursion using effect handlers
- ergonomic ways of encoding fixed-length vectors
This project will require a deep interest in programming language design and implementation,
and an enthusiasm for learning more about digital hardware. There are quite a few good